Changing the SYSCLK Rate on the chipKit Max32

afrenett
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Changing the SYSCLK Rate on the chipKit Max32

Post by afrenett » Thu Aug 04, 2016 4:51 pm

The title is pretty much self explanatory. I want to change the sysclock rate from 80 MHz to 60 MHz (or something at least less than 70 MHz). I understand that other IDEs may allow you to easily change the configuration bits, but the code I'm working with works well with MPIDE. Is there any way to change the PLL mulitplier in MPIDE? If not, advice on the easiest way to do so would be appreciated.

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majenko
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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by majenko » Thu Aug 04, 2016 6:48 pm

You will need a custom bootloader with the different clock settings in it. You will also need to change the clock speed in the boards.txt file for the variant to match, or everything will be calculated wrong.

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afrenett
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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by afrenett » Thu Aug 04, 2016 9:04 pm

Thanks for the response. A few questions (I'm relatively new to this):

1. Where would I find such a custom bootloader, and how do I get it onto the board? I'm currently communicating via USB and using MPIDE. I know I probably need another cable, but am not sure which.

2. Where in the boards.txt file do I need to change the speed? Just a brief glance through tells me that there's more than one location.

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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by majenko » Thu Aug 04, 2016 11:30 pm

Actually, you should be able to vary the PLL settings at runtime using the OSCCON register. Details here: Of course, doing so will mean the chip is running at the "wrong" speed, so you still need to change boards.txt to compensate. The specific file is pic32/variants/Max32/boards.txt for MPIDE and pic32/boards.txt for Arduino IDE. You're looking for mega_pic32.build.f_cpu.
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afrenett
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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by afrenett » Fri Aug 05, 2016 3:17 pm

I had seen the OSCCON register, but I noticed that the PLL divider/multiplier bits should or could not be manipulated while PLL is enabled.

I have tried using "#pragma PLLODIV = 2" at the beginning of the MPIDE file, but to no effect. Should I be trying a different way?

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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by majenko » Fri Aug 05, 2016 8:54 pm

You can't specify config bits from within MPIDE, they are hard coded in the bootloader.

Switching the PLL settings is a multi-stage process and involves switching clock sources numerous times.

In theory it should work fine if you:

1. Switch to the FRC internal clock source (NOSC = 0b000)
2. Configure the PLL settings as you wish
3. Switch back to the PRIPLL clock source (NOSC = 0b011)

One caveat of this, though, is that clock switching has to be enabled, and I am not sure that it is by default in the MAX32 bootloader. It's in the config bits, so is hard-coded in the bootloader and can't (easily) be changed without recompiling the bootloader and reprogramming it using a hardware programmer - in which case you may as well set the PLL up how you want it at the same time and not then need to mess with OSCCON.

The bootloader source is here: https://github.com/chipKIT32/PIC32-avrdude-bootloader but Digilent in their wisdom decided that they didn't want us to have our own configurations for their boards (I have no idea why, they often don't make sense to me) so you will have to take something similar and bend it to the MAX32. I do, though, have sneaky backups of all the Digilent configurations in my own fork, so you could maybe use those and feed them into your own clone of the repo: https://github.com/majenkotech/PIC32-av ... digilent.h
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afrenett
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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by afrenett » Mon Aug 08, 2016 4:31 pm

Okay, thanks. Is there an available hex file with the Digilent configuration on your site? I'm not totally sure how to upload a new bootloader, but I know you can use the MPLAB IPE (I have the chipKit PGM cable). It asks for a hex file, however.

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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by majenko » Mon Aug 08, 2016 5:36 pm

There are HEX files available, but they have the PLL set up to 80MHz. If you want anything other than that you'll have to compile your own.

I have to ask, though, why, really, you feel you need to have a 60MHz clock. You're just needlessly slowing the system down. Whatever you are doing can be done just as well (if not better) at 80MHz.
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afrenett
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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by afrenett » Mon Aug 08, 2016 6:37 pm

The end goal is not to simply slow the machine down. I'll need to mess with other configuration bits, and I figured that modifying the PLL gives an easy mechanism to check whether or not the configuration actually changed.

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Re: Changing the SYSCLK Rate on the chipKit Max32

Post by majenko » Mon Aug 08, 2016 6:40 pm

I have managed to change the config bits from software before now. Its risky business, and you risk corrupting your bootloader, but it can be done. Otherwise you will have to get the hang of building your own bootloader.

I will see if I can dig out the work I did to edit the config bits and see if it still works...

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