Having enabled parity , what about parity error interrupts ,
The UART can generate interrupts reflecting the events that occur during the data
communication. The following interrupts can be generated:
â€¢ Receiver-data-available interrupt, signalled by UxRXIF. This event occurs based on the
URXISEL<1:0> control bits (UxSTA<7:6>). Refer to 21.6.3 â€œReceive Interruptâ€ for details.
â€¢ Transmitter buffer-empty interrupt, signalled by UxTXIF. This event occurs based on the
UTXISEL<1:0> control bits (UxSTA<15:14>). Refer to 21.5.2 â€œTransmit Interruptâ€ for
â€¢ UART-error interrupt, signalled by UxEIF.
- This event occurs when any of the following error conditions take place:
â€¢ Parity error PERR (UxSTA<3>) is detected
â€¢ Framing Error FERR (UxSTA<2>) is detected
â€¢ Overflow condition for the receive buffer OERR (UxSTA<1>) occurs
All these interrupt flags must be cleared in software. Refer to 21.5.2 â€œTransmit Interruptâ€ and
21.6.3 â€œReceive Interruptâ€ for more information.
A UART device is enabled as a source of interrupts through the following respective UART
interrupt enable bits:
Can you see errors when reading UxSTA .
can you loopback tx--Rx .
Not an expert......